

http://charon.sk/heptaphasis/
https://github.com/charonme/heptaphasis
based on the Yusynth Quadrature LFO

eagle schematic
eagle PCB
It is an unfortunate thing with such quadratures - I've encountered such frustrations and believe that in part it is down to how clean the board is (flux could lead to stray leakage). I know that when I was prototyping I had to do a lot of cleaning - so next tests I'm going to try with water-soluble flux (easier to remove than regular 'no clean').charonme wrote:well... it doesn't work, the oscillations die off when lowering the frequency with the pot. using polystyrene THT caps instead of the 470nF SMD X7R helped only a little
Asked and answered in the original thread. There's no room for another socket on the front panel.ersatzplanet wrote:No room for the 8th phase?
I don't know much about transistors, so maybe, but it works well on the breadboard and in falstad simulation like this.guest wrote:are T8,9 backwards in your schematic? shouldnt it be the collectors that go to the summing junctions?
maybe in the next revision with a 4hp panel and two columns of output jacks. Or a jumper on the pcb could turn the frequency CV input jack into the 8th phase outputnigel wrote:Asked and answered in the original thread. There's no room for another socket on the front panel.ersatzplanet wrote:No room for the 8th phase?
yes, the capacitor-transistor design comes from guest. The circuit around T8 introduces a rough nanosecond disturbance to which the filter responds with starting the oscillations quickly and the circuit around T9 increases the frequency to max for a couple of seconds so that the oscillations stabilize themselves quicklyBugBrand wrote:I haven't seen uses like the bits around TR8 & TR9 - are these meant for starting up - pushing things high so oscillations start?
In the work I have done on this system, if it is running at a high frequency and you quickly turn the frequency down, then there is no settling time required. The signals are always at the correct relative phase and just start running slower. So it seems to me all you need for startup is a voltage pulse at the CV input. Sure, drive it with a transistor switch if you want, but I say try just a series RC from V+ to the base of the input transistor.charonme wrote:yes, the capacitor-transistor design comes from guest. The circuit around T8 introduces a rough nanosecond disturbance to which the filter responds with starting the oscillations quickly and the circuit around T9 increases the frequency to max for a couple of seconds so that the oscillations stabilize themselves quicklyBugBrand wrote:I haven't seen uses like the bits around TR8 & TR9 - are these meant for starting up - pushing things high so oscillations start?
if my LFO had a high enough max frequency then yes, this would work, but my LFO's top frequency is just <20Hz, so without the pulse through T8 it would look like this:frijitz wrote:In the work I have done on this system, if it is running at a high frequency and you quickly turn the frequency down, then there is no settling time required. The signals are always at the correct relative phase and just start running slower. So it seems to me all you need for startup is a voltage pulse at the CV input. Sure, drive it with a transistor switch if you want, but I say try just a series RC from V+ to the base of the input transistor.
Ah, I see.charonme wrote:if my LFO had a high enough max frequency then yes, this would work, but my LFO's top frequency is just <20Hz,frijitz wrote:In the work I have done on this system, if it is running at a high frequency and you quickly turn the frequency down, then there is no settling time required. The signals are always at the correct relative phase and just start running slower. So it seems to me all you need for startup is a voltage pulse at the CV input. Sure, drive it with a transistor switch if you want, but I say try just a series RC from V+ to the base of the input transistor.